- memory address decoder
- <edp> ■ Speicheradressendekodierer m
English-german technical dictionary. 2013.
English-german technical dictionary. 2013.
Decoder — For the drum and bass musician, see Decoder (artist). For the band, see Decoder (band) A Digitrax DH163AT DCC decoder in an Athearn locomotive before the shell goes on. A decoder is a device which does the reverse operation of an encoder, undoing … Wikipedia
Memory-mapped I/O — For more generic meanings of input/output port, see Computer port (hardware). MMIO redirects here. For the airport serving Saltillo, Mexico, assigned the ICAO code MMIO, see Plan de Guadalupe International Airport. Memory mapped I/O (MMIO) and… … Wikipedia
Conventional memory — Memory areas of the IBM PC family. In DOS memory management, conventional memory, also called base memory, is the first 640 kilobytes (640 × 1024 bytes) of the memory on IBM PC or compatible systems. It is the read write memory usable by the… … Wikipedia
Sum addressed decoder — In CPU design, a Sum Addressed Decoder or Sum Addressed Memory (SAM) Decoder is a method of reducing the latency of the CPU cache access. This is achieved by fusing the address generation sum operation with the decode operation in the cache… … Wikipedia
Upper Memory Area — The Upper Memory Area (UMA) is a design feature of IBM PC compatible x86 computers that was responsible for the 640 KB barrier.Reserved memory spaceIBM reserved the uppermost region of the PC memory map for ROM, RAM on peripherals and memory… … Wikipedia
CPU cache — Cache memory redirects here. For the general use, see cache. A CPU cache is a cache used by the central processing unit of a computer to reduce the average time to access memory. The cache is a smaller, faster memory which stores copies of the… … Wikipedia
Instruction cycle — An instruction cycle (sometimes called fetch and execute cycle, fetch decode execute cycle, or FDX) is the basic operation cycle of a computer. It is the process by which a computer retrieves a program instruction from its memory, determines what … Wikipedia
Datapath — A datapath is a collection of functional units, such as arithmetic logic units or multipliers, that perform data processing operations. Most central processing units consist of a datapath and a control unit, with a large part of the control unit… … Wikipedia
Vector processor — A vector processor, or array processor, is a CPU design where the instruction set includes operations that can perform mathematical operations on multiple data elements simultaneously. This is in contrast to a scalar processor which handles one… … Wikipedia
Algorithmic efficiency — In computer science, efficiency is used to describe properties of an algorithm relating to how much of various types of resources it consumes. Algorithmic efficiency can be thought of as analogous to engineering productivity for a repeating or… … Wikipedia
S-1990 — The S 1990 is a VLSI integrated circuit created by NEC for the MSX Turbo R home computer, and is called the TurboR bus controller . Together with a R800 CPU and a T9769 MSX Engine chip it forms the heart of a TurboR MSX system. The S 1990 was… … Wikipedia